Commit 7a9e27d1 authored by Mathieu Nivoliez's avatar Mathieu Nivoliez

started to add routes

parent c044b1bb
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(module LED_SK6812MINI_PLCC4_3.5x3.5mm_P1.75mm_reversible (layer F.Cu) (tedit 5CE96DE5)
(descr https://cdn-shop.adafruit.com/product-files/2686/SK6812MINI_REV.01-1-2.pdf)
(tags "LED RGB NeoPixel Mini")
(attr smd)
(fp_text reference REF** (at 0 -2.75) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value LED_SK6812MINI_PLCC4_3.5x3.5mm_P1.75mm_reversible (at 0 3.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user 1 (at -3.5 -0.875) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.1)))
)
(fp_line (start 2.8 -2) (end -2.8 -2) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.8 2) (end 2.8 -2) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.8 2) (end 2.8 2) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.8 -2) (end -2.8 2) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 0.75) (end 0.75 1.75) (layer F.Fab) (width 0.1))
(fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.Fab) (width 0.1))
(fp_line (start -1.75 1.75) (end 1.75 1.75) (layer F.Fab) (width 0.1))
(fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.Fab) (width 0.1))
(fp_line (start 1.75 -1.75) (end -1.75 -1.75) (layer F.Fab) (width 0.1))
(fp_line (start -2.95 -1.95) (end 2.95 -1.95) (layer F.SilkS) (width 0.12))
(fp_line (start -2.95 1.95) (end 2.95 1.95) (layer F.SilkS) (width 0.12))
(fp_line (start 2.95 1.95) (end 2.95 0.875) (layer F.SilkS) (width 0.12))
(fp_circle (center 0 0) (end 0 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start -2.95 -1.95) (end 2.95 -1.95) (layer B.SilkS) (width 0.12))
(fp_line (start 1.75 -1.75) (end 1.75 1.75) (layer B.Fab) (width 0.1))
(fp_circle (center 0 0) (end 0 1.5) (layer B.Fab) (width 0.1))
(fp_line (start 2.95 -1.95) (end 2.95 -0.875) (layer B.SilkS) (width 0.12))
(fp_line (start -2.95 1.95) (end 2.95 1.95) (layer B.SilkS) (width 0.12))
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer B.Fab) (width 0.1))
(fp_line (start 1.75 1.75) (end -1.75 1.75) (layer B.Fab) (width 0.1))
(fp_text user 1 (at -3.5 0.875) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 2.8 -2) (end 2.8 2) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.5 0.5) (thickness 0.1)) (justify mirror))
)
(fp_line (start 2.8 2) (end -2.8 2) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.75 -0.75) (end 0.75 -1.75) (layer B.Fab) (width 0.1))
(fp_line (start -2.8 2) (end -2.8 -2) (layer B.CrtYd) (width 0.05))
(fp_line (start -2.8 -2) (end 2.8 -2) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.75 1.75) (end -1.75 -1.75) (layer B.Fab) (width 0.1))
(pad 3 smd rect (at 1.75 0.875) (size 1.6 0.85) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 1.75 -0.875) (size 1.6 0.85) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.75 0.875) (size 1.6 0.85) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -1.75 -0.875) (size 1.6 0.85) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -1.75 0.875) (size 1.6 0.85) (layers B.Cu B.Paste B.Mask))
(pad 2 smd rect (at -1.75 -0.875) (size 1.6 0.85) (layers B.Cu B.Paste B.Mask))
(pad 4 smd rect (at 1.75 0.875) (size 1.6 0.85) (layers B.Cu B.Paste B.Mask))
(pad 3 smd rect (at 1.75 -0.875) (size 1.6 0.85) (layers B.Cu B.Paste B.Mask))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_SK6812MINI_PLCC4_3.5x3.5mm_P1.75mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
update=Fri 10 May 2019 12:47:57 CEST
update=Sat 25 May 2019 17:07:17 CEST
version=1
last_client=kicad
[general]
......@@ -12,6 +12,16 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=./doc
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
......@@ -28,7 +38,7 @@ MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth1=0.254
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
......@@ -57,7 +67,7 @@ OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
......@@ -223,12 +233,23 @@ Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=1
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
Clearance=0.0508
TrackWidth=0.254
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.0508
TrackWidth=0.381
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
......@@ -236,13 +257,3 @@ uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=./doc
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
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